Preparation Considerations

Cutting

Characteristics:

• Semiconductor specimens are usually multi-material assemblies, combininghardbrittle silicon or ceramics with ductile copper, aluminum, solder, and often soft encapsulants or polymers.
• Thin layers, passivation,bond pads, wire-bond areas, TSV/viastructures, and die-to-package interfaces can be damaged by shock, vibration, heat, or poor orientation during sectioning.
• Silicon and glass can chip or develop subsurfacecracking, whilesoft metals and solders can smear or burr under the same cutting condition.
• The sectioning step must keep the trueregionof interest intact, because excessive kerf loss or damage can remove thin features before grinding even begins.

More Attention:

• Wet, low-damage sectioning with controlled feed, load, andcoolantflow so heat and mechanical strain stay low.
• Precision cutting, or cleaving where appropriate, when the target issmall,delicate, or very close to the cut line.
• Specimen support and clamping stability so the partdoesnot vibrate, shift, or break out during sectioning.
• Orientation of the cutrelative to die edges, layer stacks, solderjoints, vias, bond wires, or interfaces being evaluated.
• Whether the cut damageis shallow enough to beremoved later without losing thin films, corners, or near-surface defects.

Avoid:

• Edge chipping and subsurface cracking in silicon,glass,or brittle dielectric materials.
• Smearing of copper, aluminum, or solder acrossinterfaces and defect sites.
• Delamination of layered package materials, coatings,underfills,or bonded interfaces.
• Local overheating that alterspolymers, adhesives, or heat-sensitiveregions.
• Excessive kerf loss or cutting damage thatshiftsor destroys the true feature of interest.

 

Mounting

Characteristics:

• Semiconductor samples often contain intricate geometries, cavities, weakinterfaces, andsurface-connected features that need full support before grinding and polishing.
• Edge retentionis critical because many analysesdepend on accurate layer thickness, interface condition, crack location, void distribution, or die edge quality.
• Hot mounting canbe risky for assemblies containingpolymers, solders, adhesives, or other constituents sensitive to heat and pressure.
• Incomplete infiltration around fine structures canleave unsupported zonesthat later appear as false voids, gaps, or separations.

More Attention:

• Low-viscosity, low-shrinkage epoxy systems that can penetratetightgeometries and provide stable edge support.
• Vacuum impregnation or vacuum cycling whenpores, cracks, underfills, wire-bondregions, or narrow gaps must be fully infiltrated.
• Orientation of the area of interest before curingso thecorrect plane is exposed and supported.
• Adhesion andinfiltration around the full specimenperimeter so gaps do not open during later preparation steps.
• Coplanarity and mechanical stability inside themount sothe specimen does not move, chatter, or tilt under load.

Avoid:

• Shrinkage gaps at the specimen edge latermistaken forinterfacial separation.
• Trapped air or incomplete infiltration aroundfine structuresand cavities.
• Heat- or pressure-induced distortion of polymers, solders, adhesives,ordelicate package features.
• Unsupported edges and corners that break outduring the firstgrinding step.
• Mounting artifactsthat are later misread asreal voids, cracks, delamination, or process defects.

Grinding

Characteristics:

• Grinding must remove sectioning damage while keepingthefull cross-section flat across materials with very different hardness, toughness, and abrasion behavior.
• Silicon ishard and brittle, while copper, aluminum,and solder are much more ductile;  package resins and polymers are softer still, so differential removal can develop quickly.
• If grinding starts too coarsely on silicon,impact damage can extenddeeper than expected and complicate later interpretation.
• The main grinding challenge is efficientstockremoval without creating excessive relief, smearing, edge rounding, or fracture.

More Attention:

• Starting with the finest abrasive that stillremoves cut damageefficiently; when silicon is the target, grinding should begin no coarser than about 600 grit.
• Fresh abrasive, controlled load, and goodlubrication so thesurface is cut cleanly instead of rubbed or overloaded.
• Flatness across the entire specimen so silicon, metals,dielectrics,and package materials remain in the same plane.
• Complete removal of the previous stage’s scratches anddeformationbefore moving to a finer step.
• Signs of cracking, pull-out, embedded abrasive, smearing, or selectiveerosionat each stage.

 

Avoid:

• Impact damage and deepcracking in siliconand other brittle constituents.
• Excessive relief between silicon, metallines, ceramics,and polymeric package materials.
• Smearing of solder or soft metals over interfaces, voids,orcracks.
• Pull-out of brittle fragments, fillers, particles, or weakly supportedconstituents.
• Carrying a mechanically damaged surfaceforward into thepolishing stages.

Polishing

Characteristics:

• Final polishing must reveal interfaces,cracks,voids, layer thicknesses, passivation features, and microstructural details without changing their apparent geometry.
• Because semiconductor samples are mixed-material systems, different constituentspolishat different rates, so relief can develop rapidly if the cloth and abrasive are not well matched.
• Silicon and oxide-containing structures generallyrespond better to colloidal silicafinal polishing, while some interface analyses may still benefit from very fine diamond before the last step.
• A bright surface aloneisnot enough; the final objective is dimensional and structural fidelity for optical, SEM, EDS, and failure-analysis work.

More Attention:

• The polishing cloth and abrasive sequence selected foramixed hard-brittle-soft system rather than for a single material.
• Low polishing force and adequate lubricant sosoftmetals are not dragged across the surface.
• Whether interfaces, die corners, bondpads, vias,layer boundaries, and defect edges remain sharp after the final step.
• Whether silicon, glass, oxides, andmetals are all represented withoutexcessive differential relief.
• The final surface flatness required for reliable measurement,interpretation,and imaging.

Avoid:

• Smearing of copper, aluminum, or solder acrossboundaries, voids, or cracks.
• Excessive relief that distorts real layer thickness orinterfacetopography.
• Rounded edges at die corners,pads, vias, or passivationboundaries.
• Pull-out of fragile phases, fillers, glass fibers, or weakly supported features during thelastpolishing step.
• A polished surface that appears cleanbuthides the true defect morphology or microstructural condition.